/*
 * Copyright (c) 2004-2006 The Regents of The University of Michigan
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met: redistributions of source code must retain the above copyright
 * notice, this list of conditions and the following disclaimer;
 * redistributions in binary form must reproduce the above copyright
 * notice, this list of conditions and the following disclaimer in the
 * documentation and/or other materials provided with the distribution;
 * neither the name of the copyright holders nor the names of its
 * contributors may be used to endorse or promote products derived from
 * this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Authors: Kevin Lim
 */

#ifndef __CPU_EDGE_TOURNAMENT_PERCEPTRON_PRED_HH__
#define __CPU_EDGE_TOURNAMENT_PERCEPTRON_PRED_HH__

#include <vector>

#include "base/types.hh"
#include "cpu/edge/sat_counter.hh"
#include "config/the_isa.hh"
#include "arch/isa_traits.hh"
#include "cpu/edge/pred/perceptron.hh"
#include "params/DerivEdgeCPU.hh"

/**
 * Implements a tournament branch predictor, hopefully identical to the one
 * used in the 21264.  It has a local predictor, which uses a local history
 * table to index into a table of counters, and a global predictor, which
 * uses a global history to index into a table of counters.  A choice
 * predictor chooses between the two.  Only the global history register
 * is speculatively updated, the rest are updated upon branches committing
 * or misspeculating.
 */
template<class Impl>
class TournamentPerceptron
{
  public:
    typedef TheISA::BlockID BlockID;
    typedef TheISA::ExitID ExitID;
    /**
     * Default branch predictor constructor.
     */
    TournamentPerceptron(DerivEdgeCPUParams *params);

    ~TournamentPerceptron();

    void regStats();

    void reset();	
    /**
     * Looks up the given block address in the branch predictor and returns
     * an exit ID of the block.  Also creates a
     * BPHistory object to store any state it will need on squash/update.
     * @param block_addr The address of the block to look up.
     * @param bp_history Pointer that will be set to the BPHistory object.
     * @return the ID of the exit of the block.
     */
    TheISA::ExitID lookup(BlockID blockID, BlockID oldest_blockID, 
        Addr &block_addr, int addr_space_ID, ThreadID tid);   

    /**
     * Updates the branch predictor with the actual result of a branch.
     * @param branch_addr The address of the branch to update.
     * @param taken Whether or not the branch was taken.
     * @param bp_history Pointer to the BPHistory object that was created
     * when the branch was predicted.
     */
    void update(BlockID blockID, Addr &block_addr, int addr_space_id,
                              ExitID actual_exitID,ThreadID tid);

    /**
     * Restores the global branch history on a squash.
     */
    void squash(BlockID blockID, ExitID exitID, ThreadID tid);

    /**
     * Restores the global branch history on a squash.
     */
    void squash(BlockID blockID,ThreadID tid);

    unsigned lookupGetIndex(Addr &block_PC, ThreadID tid);

    unsigned updateGetIndex(BlockID blockID, Addr &block_PC, ThreadID tid);

  private:

    /**
     * Returns the local history index, given a branch address.
     * @param branch_addr The branch's PC address.
     */
    inline unsigned calcLocHistIdx(Addr &block_addr,int addr_space_ID);

    inline unsigned calcLocPredIdx(Addr &block_addr,uint32_t history);

    inline unsigned calcChoiPredIdx(Addr &block_addr,uint32_t history);

    /** Perceptron predictor using global history.*/
   PerceptronBP<Impl> *perceptron_global;

   /** Perceptron predictor using local history. */
   PerceptronBP<Impl> *perceptron_local;

    /** Choice history register. */
    unsigned choiceHistory[Impl::MaxThreads];

    /** Choice history file. */
    std::vector<uint32_t> choiceHistoryFile;

    /** Number of bits for the choice history. */
    unsigned choiceHistoryBits;

    /** Mask to get the proper choice history. */
    unsigned choiceHistoryMask;

    /** Array of counters that make up the choice predictor. */
    std::vector<SatCounter> choiceCtrs;

    /** Size of the choice predictor (identical to the global predictor). */
    unsigned choicePredictorSize;

    /** Number of bits of the choice predictor's counters. */
    unsigned choiceCtrBits;

    /** Number of bits to shift the instruction over to get rid of the word
     *  offset.
     */
    unsigned blockShiftAmt;

    /** Threshold for the counter value; above the threshold is taken,
     *  equal to or below the threshold is not taken.
     */
    unsigned threshold;

    unsigned localChoosen;

    unsigned globalChoosen;

};

#endif // __CPU_EDGE_TOURNAMENT_PERCEPTRON_PRED_HH__

